Fabrication of integrated circuits on semiconductor wafers involves repetitive application of processes, such as masking, etching, layer formation, and doping. This invention primarily concerns the etching process, that is, the process of removing selected portions of layers of material during integrated circuit fabrication.
As the densities and complexities of semiconductor devices have increased, the sizes of the various features have decreased, and the progress toward smaller feature sizes has given rise to a need for improved control over the etching process. It can be particularly desirable, for example, that the edge profile be straight and vertical and sharply defined. And, for example, it can be particularly desirable that the etching process be controllable so that etching can be stopped after the portion of the etched layer has been fully etched through, but before an unacceptable amount of the underlying material has been etched away.
Any of various anisotropic etching techniques can provide a sharply defined steep (high aspect ratio) edge profile. Suitable anisotropic techniques include dry etching by ion sputtering, and ion assist etching such as, for example, the Lam Research TCP 9400 polysilicon etcher.
Some etch techniques are selective to some degree, that is, the techniques remove some materials more rapidly than other materials, and an etch technique may be selected that is selective for the etched material as compared with the underlying material. Typically, anisotropic techniques providing an acceptable edge profile are not highly selective for the etched material as compared with the material underlying the etched layer, and permitting the process to continue etching after a portion of the underlying layer has been results in removal of part of the underlying material, which may produce a defect.
The length of time required to complete an etch of a particular material using a particular etch technique can be approximated on the basis of experience or by trial. Owing to variations in processing, however, different wafers in a process run can in practice have significantly different etch rates. An etching strategy that simply allows an etch to proceed for a predetermined length of time poses a risk that on some wafers etch will be incomplete or that underlying material will be etched. Accordingly, in state-of-the art processing, some provision is typically made for monitoring the etch process to determine when the etch has proceeded to the point at which some portion of the underlying layer is exposed. One approach to detecting when the underlayer has been exposed is to monitor the plasma emission product; a change in the plasma emission product signals exposure of the underlayer, and at that point the process is switched to a more highly selective etch technique, often termed an “over etch”.
One approach to etch endpoint detection, useful in processes for etching transparent materials such as silicon dioxide (SiO2), or partially transparent materials such as polysilicon, employs interferometry. In this approach a beam of photons at a wavelength to which the material to be etched is at least partially transparent, is directed at the layer that is to be etched, and a reflected portion of the beam is detected by a suitable photodetector. Some of the beam is reflected by the front (upper) surface of the layer to be etched, and some is reflected by the back (lower) surface of the layer to be etched. These reflected components interfere optically according to the relation2d=N(λ/n), where d is the thickness of the layer along the path of the beam, λ is the wavelength of the photon beam, and n is the refractive index of the layer material. As will be appreciated, the front and rear surfaces of the layer to be etched may be described as interfaces at the upper limit of the layer material and between the layer material and the underlying layer. Where there is no phase reversal at the interfaces, for integral values of N, that is N=1, 2, 3 . . . , the reflected components interfere constructively, producing intensity maxima; and for half-integral values of N, that is, where N=½, {fraction (3/2)}, {fraction (5/2)} . . . , the reflected components interfere destructively, producing intensity minima. Where the different refractive indices at the interface result in a phase reversal at one of the surfaces, as is the case where the layer to be etched is a polysilicon (refractive index about 4) and the underlying layer is a silicon dioxide (refractive index about 1.5), for example, intensity minima are produced at integral values of N and intensity maxima are produced at half-integral values of N.
During the course of removal of material by the etch, as the thickness d of the layer decreases, the intensity of the reflected portion of the beam cycles sinusoidally over time. The distance between adjacent intensity maxima is ½(λ/n), so that monitoring features of the intensity curve during etch can provide measures of the thickness of material removed from the etched layer and of the etch rate. A change from the sinusoidal time-course of intensity occurs more or less abruptly at the moment the thickness of the layer reaches 0, that is, at the moment the etch is complete. One conventional way to attempt to detect etch endpoint is to try to recognize, as precisely as practicable, an abrupt change in the shape of the intensity curve.
It is possible, at least in principle, to employ interferometry to calculate an etch depth, by counting interference fringes at a particular wavelength. In practice, however, the material being etched may not be sufficiently transparent at useful wavelengths. Polysilicon, for example, absorbs more at shorter wavelengths, so that at interference fringes from shorter wavelengths may not be detectable over the full thickness of the layer. Polysilicon is more transparent to longer wavelengths, but the resulting interference fringes are farther apart, so that etch depth cannot be accurately determined from them. Moreover, the initial thickness of the layer to be etched can vary significantly from one wafer to another within a run, and, because counting fringes provides only a measure of etch depth, the thickness of material remaining varies significantly as well.
As the dimensions of features in integrated circuits have decreased, the thicknesses of certain of the layers have also become exceedingly small. The dimensions must fall within increasingly smaller tolerances, so that even a small degree of etch in the material underlying an etched layer, which may result from permitting the etch process to continue even a very short time beyond the endpoint, can result in defective performance. A need exists, therefore, for increasingly precise etch endpoint detection.